1. Field of the Invention
The present invention relates to a semiconductor device and, more particularly, relates to a semiconductor device which has a function of testing a connection state of signal lines.
2. Description of Related Art
A DRAM (Dynamic Random Access Memory) stores data by means of charges held in memory cells. Bit lines are connected to memory cells when a word line is activated. When the bit lines and local I/O lines are connected through column switches, data can be read and written through the local I/O lines. Connection of the bit lines and local I/O lines is controlled by a column selection signal supplied via column selection signal lines. The bit lines are classified into some groups (hereinafter, “bit line groups”). A different column selection signal line and column selection signal are allocated per bit line group (see Japanese Patent Application Laid-Open No. 10-313101).
When a bit line or a memory cell have failure (hereinafter, simply “line failure”), an access to this memory is replaced with an access to a preliminary memory cell which is referred to as a “redundant cell”. By contrast with this, when a connection between a column selection signal line and a bit line group has failure (hereinafter, “contact failure”), all bit lines (a plurality of bit lines associated with one column selection signal line) included in this bit line group cannot be utilized. For example, with a structure of a plurality of switches (a plurality of transistors) which connect a plurality of local I/O lines associated with a plurality of bit lines according to one column selection signal, column selection signal lines (wiring layer) are electrically connected to gate electrodes (gate electrode layer) of a plurality of transistors through contact holes (via layers). When electrical failure occurs that a conduction resistance of these contact holes becomes high, contact failure occurs. Also in this case, by replacing an access to all corresponding memory cells with an access to redundant cells, it is possible to save a bad address group.
However, even when a column selection signal line in which contact failure occurs is invalidated (not used), a bit line group (a plurality of nodes of a plurality of gate electrodes) of a replacement target is likely to accidentally connect with local I/O lines due to, for example, floating charges. Meanwhile, a sense amplifier of the bit line group of a replacement target is activated, and amplifies and holds some indefinite data. This accidental connection may cause an error operation. Hence, when contact failure occurs, it is better to discard products instead of forcedly recovering contact failure using redundant cells. Then, it is necessary to efficiently discriminate line failure and contact failure upon test of semiconductor devices.